Silicon Vision LLC. Vacancies

Digital ASIC Senior Design Engineer (REF: DSE001)
Job Description

Our group offers a unique opportunity to grow your digital design skills while you assist with the development of different types of ASICs. Your duties will include Verilog/VHDL coding, functional verification, synthesis, and timing analysis.

Responsibilities include:

Develop and execute detailed block-level and chip-level digital designs.
Write and verify RTL code (Verilog/VHDL) for digital sub-systems of system-on-a-chip (SOC).
Synthesis of RTL code.
Run static timing verification on the gate-level netlist with parasitics
Writing test plans and test-bench development.
Generation of required documentation and contribution to the validation and debugging of the fabricated silicon.

Required Skills

7+ BS or MS in Electrical Engineering with background in CMOS ASIC design
At least 5 years of industry experience is desired
Design and verification experience at the RTL and gate-level (Verilog/VHDL)
Experience with synthesis tools
Working knowledge of Cadence's IC design and verification tools on (NC-Verilog, AMS-designer).
Familiarity with SystemVerilog.
Knowledge of high speed and low power digital design techniques
Strong documentation, communication, and presentation skills.
Excellent problem solving and analytical skills.
Must exhibit technical leadership and have experience with team building, process improvement, conflict resolution, and motivating people.
Knowledge of P&R and DFT tools is a plus.

Company Offers

A stimulating, exciting and dynamic work environment, where your personal contributions to our business success will be optimally rewarded
Room for career growth and external training.
A competitive packages including excellent salaries, health insurance for employees and their families, bonus system and stock options

Analog Mixed Signal Project Manager (REF: PM001)
Job Description

Candidate will participate in Analog Mixed Signal IC developments from initial customer proposal development thru managing Si-Vision development effort, and third party design partners. The Project Manager oversees all aspects of the project using planning, monitoring, and controlling processes.

Responsibilities include:

Coordinate with the technical design engineers to define the scope of work for assigned projects and develop statements of work, work breakdown structures, task estimates, and specific tasks and milestones to implement for customer or internal projects.
Responsible for mentoring junior engineers and providing recommendations on design, layout and test methodologies
Plan, analyze, design, simulate, verify, document and release to production ICs for high speed mixed signal applications
Work at all levels of design including collaborating with a system architect to analyze topology tradeoffs and generate detailed specifications, working independently to propose circuit level implementations, performing transistor-level design and simulation, overseeing layout of circuit blocks, performing physical extraction and verification, and perform bench-tests in silicon
Design analog/mixed signal circuits, including DACs, ADCs, high-speed, high-resolution data converters, switch-cap circuitry, Gm-C filters, PLL, sigma-delta modulators, regulators, Bandgap, etc
Work closely with layout team
Generation of required documentation and contribution to the validation and debugging of the fabricated silicon.
Assist verification team to design PCB board for chip testing
Assist in development of production test

Required Skills

7+ Years of experience in Analog CMOS IC design on Cadence and/or Mentor tools.
Master/PhD degree would be a plus.
Hands on the design of high speed analog mixed signal ICs.
At least 2 years of project management experience for product development.
Knowledge in the state of the art technologies and deep sub-micron processes
Knowledge in high speed analog mixed signal and RFIC layout techniques.
Must exhibit technical leadership and have experience with team building, process improvement, conflict resolution, and motivating people

Senior Analog IC Design Engineer (REF: SDE001)
Job Description

Candidate will participate as a team player in the design of complex CMOS mixed-signal circuits and systems.
He may be responsible for leading and guiding junior engineers in small projects.
Will be responsible for the schematic entry, simulation, and verification of relevant analog IC blocks.
Will support the place and route activities and will be involved in the final verification and validation of the chip database.
Will generate the required documentation and contribute to the validation and debugging of the resulting silicon.
Will work closely with the system architect and IC layout team throughout the design cycle.

Required Skills

2-4 Years of experience in Analog CMOS IC design on Cadence and/or Mentor tools.
Experience in the design of different mixed signal blocks as PLLs, data converters, opamps, bias cells is a must
RFIC experience is a plus.
Excellent use of MATLAB and behavioral modeling languages.
Knowledge in the state of the art technologies and deep sub-micron processes.
Knowledge in scripting languages (Ocean, Perl) would be advantageous
Knowledge in analog and RFIC layout techniques is a plus.
Knowledge in the state of the art technologies and deep sub-micron processes.

Qualifications

Analog IC Design Engineer (REF DE01)

Job Description

Candidate will participate as a team player in the design of highly complex mixed-signal system chips for high volume consumer applications, such as mobile phones, MP3 players, HDTVs, LCDs and other video applications.
Candidate will work in close cooperation with the System Architects, the Chip Architects, the Digital IC designers and Physical IC Designers and under the leadership of a Project Manager to deliver in time and according to required specifications, mixed-signal chips that exceed customer expectations.
Will be responsible for the schematic entry, simulation, and verification of relevant analog IC blocks.
Will support the place and route activities and will be involved in the final verification and validation of the chip database.
Will generate the required documentation and contribute to the validation and debugging of the fabricated silicon.
Will work closely with the system architect and IC layout team throughout the design cycle.

Required Skills

Qualifications